Film bulk acoustic resonator structure and method of making

ABSTRACT

A film bulk acoustic resonator is formed on a substrate having a major surface. The film bulk acoustic resonator includes an elongated stack. The elongated stack includes a layer of piezoelectric material positioned between a first conductive layer deposited on a first surface of the layer of piezoelectric material, and a second conductive layer deposited on a second surface of the layer of piezoelectric material. The elongated stack is positioned substantially perpendicular with respect to the major surface of the substrate. The first and second conductive layers are placed on the layer of piezoelectric material substantially simultaneously and in one processing step. The major surface of the substrate is in a horizontal plane and the stack of the film bulk acoustic resonator is in a substantially vertical plane. The resonator structure formed may be used either as a resonator or a filter.

This application is a continuation-in-part of U.S. application Ser. No.10/023,591, filed Dec. 17, 2001. FIELD OF THE INVENTION

[0001] The present invention pertains to forming a film bulk acousticresonator (“FBAR”) structure. More specifically, the present inventionrelates to the methods of forming a plurality of film bulk resonatorstructures on a substrate and relates to the structure of the film bulkresonator.

BACKGROUND OF THE INVENTION

[0002] In some instances it is desirable to provide a radio frequencyfront-end filter. Ceramic filters and saw filters are used as front-endradio frequency filters, ceramic filters and saw filters still dominate,but there are problems with ceramic filters and saw filters. Saw filtersstart to have excessive insertion loss above 2.4 gigahertz (GHz).Ceramic filters are large in size and can only be fabricated withincreasing difficulty as the frequency increases.

[0003] FBARs have replaced ceramic filters and saw filters in limitedcases. The FBARs have better performance than ceramic filters and sawfilters. A basic FBAR device 100 is schematically shown in FIG. 1. TheFBAR device 100 is formed on the horizontal plane of a substrate 109. Afirst layer of metal 120 is placed on the substrate 109, and then apiezoelectric layer (AlN) 130 is placed onto the metal layer 120. Asecond layer of metal 122 is placed over the piezoelectric layer 130.The first metal layer 120 serves as a first electrode 120 and the secondmetal layer 122 serves as a second electrode 122. The first electrode120, the piezoelectric layer 130, and the second electrode 122 form astack 140. A portion of the substrate 109 behind or beneath the stack140 is removed using backside bulk silicon etching. The backside bulksilicon etching is done using deep trench reactive ion etching or usinga crystallographic orientation-dependent etch, such as KOH, TMAH, andEDP. Backside bulk silicon etching produces an opening 150 in thesubstrate 109. The resulting structure is a horizontally positionedpiezoelectric layer 130 sandwiched between the first electrode 120 andthe second electrode 122 positioned above the opening 150 in thesubstrate. The FBAR is a membrane device suspended over an opening in ahorizontal substrate.

[0004]FIG. 2 illustrates the schematic of an electrical circuit 200which includes a film bulk acoustic resonator 100. The electricalcircuit 200 includes a source of radio frequency “RF” voltage 210. Thesource of RF voltage 210 is attached to the first electrode 120 viaelectrical path 220 into the second electrode 122 by the secondelectrical conductor 222. The entire stack 140 can freely resonate inthe Z direction (“D₃₃” mode) when the RF voltage at resonant frequencyis applied. The resonant frequency is determined by the thickness of themembrane or the thickness of the piezoelectric layer 130 which isdesignated by the letter d or dimension d in FIG. 2. The resonantfrequency is determined by the following formula:

[0005] f₀˜V/2d, where

[0006] f₀=the resonant frequency,

[0007] V=the acoustic velocity in the Z direction, not the voltage, and

[0008] d=the thickness of the piezoelectric layer.

[0009] It should be noted that the structure described in FIGS. 1 and 2can be used either as a resonator or as a filter. However, such astructure has many problems. For example, as the thickness of the layersare reduced, then the resonance frequency of the device will beincreased. A filter to be used in a high frequency application requiresa thin membrane. Thin membrane devices are very fragile.

[0010] The backside bulk silicon etching produces a wafer having largeopenings therein. Wafers with large openings therein are much weakerthan a wafer without openings therein. The wafers with large openingstherein are much more difficult to handle without breaking.

[0011] The membrane device that results also must be protected on bothsides of the wafer. As a result, the packaging costs associated with theFBAR membrane devices are higher than a device that must be protected onone side only.

[0012] Still a further disadvantage is that backside bulk etching ofsilicon is a slow process with significant yield problems. In addition,the equipment and processes needed to conduct a backside bulk etching ofsilicon differs from the equipment and processes used in standardintegrated circuit processing which add to the cost of production and isless compatible with standard integrated circuit production.

[0013] Thus, there is general need for an FBAR device and a method forproducing one or more FBAR devices that is more compatible with standardprocesses associated with standard integrated circuit processingtechniques. The is also a general need for a FBAR device that is moredurable. There is still a further need for an FBAR device that can beformed for high frequency applications which does not use as much areaof a wafer as current FBAR devices. There is also a general need for aFBAR device that does not have to be protected on both sides so thatpackaging costs associated with the device are less. There is also aneed for a process which keeps the wafers stronger during production sothat the wafers are easier to handle during production.

BRIEF DESCRIPTION OF THE DRAWINGS

[0014] The invention is pointed out with particularity in the appendedclaims. However, a more complete understanding of the present inventionmay be derived by referring to the detailed description when consideredin connection with the figures, wherein like reference numbers refer tosimilar items throughout the figures and:

[0015]FIG. 1 illustrates a cross sectional view of a prior art film bulkacoustic resonator.

[0016]FIG. 2 illustrates a schematic of an electrical circuit of a filmbulk acoustic resonator.

[0017]FIG. 3 illustrates a substrate or wafer from which the inventionis made.

[0018]FIG. 4 illustrates a substrate or wafer with a layer ofphotolithographic material thereon.

[0019]FIG. 5 illustrates a substrate or wafer after the a portion of thephotolithographic material has been removed.

[0020]FIG. 6 illustrates a cutaway portion of a substrate in accordancewith an embodiment of the present invention during a step of fabricationwhere trenches are made.

[0021]FIG. 7 illustrates the cutaway portion of the substrate inaccordance with an embodiment of the present invention after thetrenches are made and after the photolithographic material has beenremoved.

[0022]FIG. 8 illustrates the cutaway portion of the substrate inaccordance with an embodiment of the present invention, as apiezoelectric material is grown onto the sidewalls of the trenches andonto the horizontal surfaces of the substrate.

[0023]FIG. 9 illustrates the cutaway portion of the substrate inaccordance with an embodiment of the present invention during the stepof fabrication where the piezoelectric material is removed from the tophorizontal surface of the substrate.

[0024]FIG. 10 illustrates the cutaway portion of the substrate after thesubstrate material between the trenches has been removed.

[0025]FIG. 11 illustrates a top view of a portion of the substrate inaccordance with an embodiment of the present invention shown in FIG. 10.

[0026]FIG. 12 illustrates the cutaway portion of the substrate inaccordance with an embodiment of the present invention after the step offabrication where an isolative or dielectric layer has been placed overthe structure formed.

[0027]FIG. 13 illustrates the cutaway portion of the substrate inaccordance with an embodiment of the present invention after the step offabrication where portions of the dielectric or isolative material havebeen removed.

[0028]FIG. 14 illustrates a top view of the substrate in accordance withan embodiment of the present invention shown in FIG. 13.

[0029]FIG. 15 illustrates a cutaway portion of the substrate after thestep of fabrication where the freestanding piezoelectric portions havehad metal deposited thereon.

[0030]FIG. 16 illustrates a cutaway portion of the substrate after thestep of fabrication where the metal deposited on the top or free end ofthe piezoelectric element has been removed.

[0031]FIG. 17 illustrates a top view of the device after the step offabrication where the freestanding piezoelectric portions have had metaldeposited thereon and the electrical contacts have been placed onto thedielectric or isolative material.

[0032]FIG. 18 illustrates a cutaway portion of one of the film bulkacoustic resonators of the device.

[0033] The description set out herein illustrates the variousembodiments of the invention and such description is not intended to beconstrued as limiting in any manner.

DETAILED DESCRIPTION

[0034] Described in FIGS. 3-17 are the various process steps used tomake the inventive film bulk acoustic resonator “FBAR.” FIG. 3illustrates a substrate or wafer 300 from which the invention is made.Typically the substrate provided is a substrate having Miller indices of<110>. The substrate includes a horizontal surface 310, a horizontalsurface 312, a vertical surface 320 and a vertical surface 322. Thedesignations of horizontal and vertical indicate that the horizontalsurfaces may be substantially horizontal and may be substantiallyparallel to one another and that the vertical surfaces 320, 322 aresubstantially vertical with respect to the horizontal surfaces 310, 312.It could also be said that the vertical surfaces 320, 322 aresubstantially perpendicular to the horizontal surfaces 310, 312 of thesubstrate 300. It should be noted that the view shown in FIG. 3 is acut-away side view of the substrate or wafer 300.

[0035]FIG. 4 illustrates the substrate or wafer 300 with a layer ofphotolithographic material placed on horizontal surface 310. A layer ofphotoresist 400 is spun onto the wafer 300. A mask is then placedbetween a UV light source and the substrate 300. The mask has openingstherein and is used to selectively expose the substrate and moreparticularly the layer of photoresist to the UV light. The exposedportion can then be removed by developing the photoresist. It should benoted that a positive photoresist process is described here. However, anegative photoresist process could also be used.

[0036]FIG. 5 illustrates the substrate 300 after a portion of thephotolithographic material 400 has been removed. In other words afterthe photoresist has been developed and a portion has been removed,portions of the photoresistive layer remain in contact with thehorizontal surface 310 of the substrate 300. The portions of thephotoresist that remain after developing the layer of photoresist 400include portions 500, 502, 504, 506, and 508.

[0037]FIG. 6 illustrates a cut-away view of the substrate 300 inaccordance with an embodiment of the present invention during the nextstep of fabrication. The substrate 300, as shown in FIG. 5, is subjectedto an etching process where portions of the substrate 300 between theportions of the photoresist 500, 502, 504, 506, 508 are removed. Theetching process is depicted by the series of arrows 600 shown in FIG. 6.The etching process can be reactive ion etching, ion milling, a dry orplasma etch a wet chemistry-liquid/vapor etch or any other suitableprocess for removing portions of the substrate. Removing portions of thesubstrate results in a series of trenches 610, 612, 614, and 616. Eachof the trenches includes a first sidewall 620 and a second sidewall 622.The sidewall 620, 622 of each of the trenches 610, 612, 614, 616 aresubstantially vertical with respect to the horizontal surfaces 310, 312of the substrate 320. The substrate is formed from a silicon or siliconcarbon, “Si or SiC,” in which the horizontal surface 310 has a Millerindex of <110>. The trenches are oriented perpendicular to a directionhaving a Miller index of <111>. As a result the two sidewalls 620, 622of each of the trenches 610, 612, 614, 616 present a surface having aMiller index of <111>.

[0038] The next step, as shown in FIG. 7, is to remove thephotolithographic material 500, 502, 504, 506, 508. This leaves thesubstrate 300 and trenches 610, 612, 614 and 616. Again, the sidewallsof each of the trenches 610, 612, 614, 616 have a Miller index of <110>.

[0039] Now turning to FIG. 8, the next step includes drawing apiezoelectric layer 800 on the horizontal surface 310 of the substrateas well as on the bottom surface and sidewalls 620, 622 of each of thetrenches 610, 612, 614, 616. The piezoelectric material that is grown inthis particular embodiment is aluminum nitrate (AlN). The two sidewalls620, 622 of each of the trenches 610, 612, 614, 616 are orientatedperpendicular to <111>. A single crystalline AlN film is grown on thesidewalls. Each of the single crystalline films on the sidewall 620, 622has an axis, c, which is perpendicular to the sidewall surface 620, 622.The c axis is shown or depicted by reference numeral 810. The portion ofthe piezoelectric material 800 which is a single crystal and grown onthe sidewalls 620, 622 of each of the trenches 610, 612, 614, 616 isdepicted by reference numeral 822 for single layer crystals grown onsidewalls 622 of each of the trenches and by reference numeral 820 forsingle crystal piezoelectric material grown on the sidewalls 620 of eachof the trenches 610, 612, 614, 616. It should be noted that thepiezoelectric film grown on the lateral surfaces or at the bottoms ofeach of the trenches need not be a single crystalline structure.

[0040] The next step, as depicted by FIG. 9, is to remove thepiezoelectric layer portion on the surface 310 of the substrate. In oneembodiment, a chemical/mechanical polish (CMP) is used to remove thepiezoelectric material (AlN) on surface 310 of the substrate 300. Itshould be noted that it is also possible to use directional etching toremove the piezoelectric material (AlN) that are not on the sidewalls620, 622 of the trenches 610, 612, 614, 616.

[0041] It should be noted that between each trench 610, 612, 614, 616,there is a portion of substrate material 910, 912, 914 which is locatedbetween the trenches.

[0042] The next step in the process which is illustrated by FIG. 10 isto remove the substrate material between the trenches. In other words,the substrate material 910, 912, 914 between the trenches shown in FIG.9 is removed to produce a series of free-standing single crystalpiezoelectric structures. By removing the portions 910, 912, 914 shownin FIG. 10 between the trenches 610, 612, 614, 616, the sidewalls of thetrenches are essentially removed, leaving free-standing single crystalpiezoelectric structures 1000, 1002, 1004, 1006, 1008 and 1010.

[0043]FIG. 11 illustrates a top view of the substrate 300 shown in FIG.10. Removal of the substrate portions 910, 912, 914 produces a recessedregion 1020 within the substrate 300. The recessed region 1020 isbounded by the surface 310 around the periphery of the substrate 300. Ascan be seen, the freestanding single crystal structures are elongatedstructures that run the length of the recessed region. The singlecrystal piezoelectric structures 1000, 1002, 1004, 1006, 1008 and 1010are also substantially vertical with respect to the surface 310 of thesubstrate as well as the surface defining the recess 1020. The substrateportions 910, 912, 914 are removed using lithography and an etch. Thephotolithographic material protects most of the substrate with theexception of the areas 910, 912, 914 located between the trenches 610,612, 614, 616.

[0044] The next step, as depicted by FIG. 12, is to deposit a dielectricmaterial (SiO₂) over the entire surface of the substrate includingsurface 310 and the surface of the recess 1020 as well as over each ofthe free-standing piezoelectric elements 1000, 1002, 1004, 1006, 1008,1010. This is necessary if the substrate is conductive or will reactwith metal.

[0045] The next step, as depicted by FIGS. 13 and 14, is to remove thedielectric material on the sidewalls of the free-standing piezoelectricelements 1000, 1002, 1004, 1006, 1008, 1010. This can also be thought ofin a different way in that the dielectric material is substantiallyremoved from the portions of the substrate within the recess 1020. Itshould be noted that it is not necessary to remove all the dielectricmaterial from the recess or from the free-standing piezoelectricelements 1000, 1002, 1004, 1006, 1008, 1010. Dielectric material remainson surface 310. In other words, dielectric material substantially coverssurface 310 of the substrate 300. It is acceptable to have someuncleared dielectric material within the recessed area 1020. Theuncleared dielectric material is typically on the edges of the recess1020 near the surface 310. In other words, the uncleared material may beabout the periphery of the recess 1020 within the chip 300. Thedielectric material is removed using photolithography and a wet etch.The uncleared dielectric material such as shown as element number 1400in FIG. 14, may be uncleared due to the lack of precision shown in thephotolithography/resist step due to the depth of the recess 1020.

[0046] The surface 310 is a major surface of the substrate.

[0047] The next step is to deposit metal onto the substrate, as depictedby FIG. 15. The metal is deposited onto surface 310 and specificallyonto the dielectric material 1200 on surface 310 as well onto thesurface of the recess 1020 as well as onto the free-standingpiezoelectric elements 1000, 1002, 1004, 1006, 1008, 1010. The metalliclayer of the metal deposited is depicted by reference numeral 1500.

[0048] The next step as shown in FIGS. 16 and 17 is to usephotolithography and etching to produce a pattern of signal connectionsas well as metal on the sidewalls of each of the free-standingpiezoelectric elements 1000, 1002, 1004, 1006, 1008, 1010. Thephotolithography and etching removes the metal material from the tops ofthe piezoelectric elements 1000, 1002, 1004, 1006, 1008, 1010 andetching also removes the metal layer 1500 between each of thefree-standing piezoelectric elements 1000, 1002, 1004, 1006, 1008, 1010.The metallic layer between the sidewall 1620, 1622 of the recessed area1020 and the piezoelectric element 1000, 1010, respectively. The resultis that each of the piezoelectric elements 1000, 1002, 1004, 1006, 1008and 1010 has a metal layer on each of its sidewalls. For example,looking at the single crystal piezo element 1000 has a first conductivelayer 1610 deposited upon a first surface of the piezoelectric material1000 and a second conductive layer 1612 deposited upon a second surfaceof the piezoelectric material 1000. Each of the free-standingpiezoelectric elements 1000, 1002, 1004, 1006, 1008, 1010, each hasfirst and second conductive layers deposited upon their surface. Thefirst conductive layer 1610 becomes a first electrode and the secondconductive layer 1612 becomes a second electrode. The end result is thateach piezoelectric element 1000, 1002, 1004, 1006, 1008, 1010 issandwiched between a first electrode 1610 and a second electrode 1612.For the sake of simplicity, only the first piezoelectric element 1000 isshown with reference numeral.

[0049] It should be understood and is illustrated that each of thepiezoelectric elements 1000, 1002, 1004, 1006, 1008, 1010 is bounded bya first and second electrode. Thus, the first electrode 1610, theelongated single crystal piezoelectric element 1000 and the secondelectrode 1612 form a stack 1630. Thus, the stack 1630 is alsosubstantially vertically oriented with respect to the surface 310 of thesubstrate and with respect to the surface forming the bottom portion ofthe recess 1020. The result of the lithography and etching away of metalis also to form a pattern for interconnecting each of the stacks whichare formed. The stacks can also be looked upon as individual film bulkacoustic resonators 1700, 1702 ,1704, 1706, 1708, 1710. The patternformed also includes electrical contacts which connect the electrodes1610 on FBARs 1700, 1704 and 1708 and electrodes 1612 on FBARs 1702 and1706. This electrical contact is designated as 1720 and is formed on thesurface 310 of the substrate 300. A second metallic pattern used toconnect the signals to the various FBAR resonators is formed on theopposite end of the resonators. The electrical contact 1722 connects theelectrode 1612 of resonators 1700, 1704 and 1708 as well as theelectrode 1610 of resonator 1702 and resonator 1706 and resonator 1710.Electrical contact 1720 and electrical contact 1722 are electricallyconnected to an RF signal generating device depicted by referencenumeral 1730 in FIG. 17.

[0050] The result of the process shown in FIGS. 3-17 is a structure alsoshown in FIGS. 16 and 17. The result is vertically free-standingpiezoelectric films made and provided with electrodes on each side sothat vertically standing FBAR devices can be formed on a substrate. Alsoshown is a uniform single piezoelectric film can be grown on sidewallsof trenches to form a single crystal substrate piezo material. Inessence, film bulk acoustic resonators can be formed to be verticallyorientated with respect to the major or horizontal surface 310 of asubstrate. The FBARs are vertically oriented and require less realestate on a particular substrate. It should be noted that althoughdescribed above are a number of resonant FBAR devices formed in aparallel configuration, another structure could be easily formed ofsimilar FBARs which include FBARs in series. In addition, 6 FBAR devicesare shown in the figures. It should be understood that more or lessFBARs can be formed using the techniques described above.

[0051] This structure has many advantages. Since a single crystalstructure can be used to form the FBARs, this resonator or filter has athickness which is reduced so that high frequency devices can be formed.In addition, due to the vertical orientation of the FBARs, there is lessrequirement for real estate on a per wafer basis. Other advantagesinclude that there is no back side bulk etching required which tends tomake the resulting device or substrate weaker and more fragile and moreprone to breaking due to handling. Since there is no back side etchingrequired, the packaging costs go down because now it's only necessary topackage the FBARs formed by this invention on one side of the substrate,thus the packaging costs associated with the inventive FBAR structureand methods for forming the same are less. In addition, the FBARs formedusing this process are formed with integrated circuit processingtechniques which are compatible with standard integrated circuitproduction. The result of this is that less specialized equipment isneeded and standard processes can be used so that the cost of productionis lower and the time for production is also lower. The end result ofthis process and the structure that results is that you can produceFBARs on a single substrate using less real estate and producing a morereliable component which uses processes and techniques more compatiblewith standard IC processing.

[0052] Now turning to FIG. 18, the aspect ratio of each of the stacks1700, 1702, 1704, 1706, 1708, 1710, will now be discussed. FIG. 18illustrates a cut-away portion of one of the film bulk acousticresonators 1700 of the device shown in FIG. 17. The stack or FBAR has athickness denoted by T and has a height H. From a processing andmechanical integrity point of view, the height to the thickness of theFBAR should not be too large. In general, MIMS devices have shown thatan aspect ratio (the height divided by the thickness) of approximately50 is easy to achieve and mechanically sound. From the stand point fromperformance as well as the real estate considerations for minimizing theamount of substrate space needed to form an FBAR, the larger aspectratio is better. Reaching close to the bottom of the FBAR 1700 or theportion of the FBAR which is attached to the bottom surface of therecess 1020, is influenced by the substrate or the connection point. Theregion of influence is approximately 1-2 times the thickness as depictedby the region 1800 shown in FIG. 18. It should be noted that the region1800 has a dimension of approximately 2T or two times the thickness. Ingeneral, an aspect ratio in the range of 10-50 is preferred so that thesubstrate-influenced region 1800 is a small fraction of the total FBARand has little effect on the overall performance. In addition, an aspectratio of less then 50 is not so large as to impose processingdifficulties or produce degradative mechanical integrity in the FBAR.

[0053] The foregoing description of the specific embodiments reveals thegeneral nature of the invention sufficiently that others can, byapplying current knowledge, readily modify and/or adapt it for variousapplications without departing from the generic concept, and thereforesuch adaptations and modifications are intended to be comprehendedwithin the meaning and range of equivalents of the disclosedembodiments.

[0054] It is to be understood that the phraseology or terminologyemployed herein is for the purpose of description and not of limitation.Accordingly, the invention is intended to embrace all such alternatives,modifications, equivalents and variations as fall within the spirit andbroad scope of the appended claims.

What is claimed is:
 1. A film bulk acoustic resonator formed on asubstrate having a major surface, the film bulk acoustic resonatorcomprising: an elongated stack further comprising; a layer ofpiezoelectric material; a first conductive layer deposited on a firstsurface of the layer of piezoelectric material; and a second conductivelayer deposited on a second surface of the layer of piezoelectricmaterial, the elongated stack positioned substantially perpendicularwith respect to the major surface of the substrate.
 2. The film bulkacoustic resonator of claim 1 wherein the stack is substantiallyrectangular and has a length and a width, the stack having a first edgeassociated having the length dimension and a second edge associated withthe length dimension, one of the first edge or the second edge attachedto a second surface of the substrate.
 3. The film bulk acousticresonator of claim 2 wherein the other of the first edge or the secondedge is free with respect to the substrate.
 4. The film bulk acousticresonator of claim 1 further comprising: a dielectric layer positionedon the major surface of the substrate; and a first electric contact inelectrical communication with the first conductive layer; and a secondelectric contact in electrical communication with the second conductivelayer.
 5. The film bulk acoustic resonator of claim 2 further comprisinga third major surface, the first major surface having an openingtherein, the opening including the second major surface, the third majorsurface of the substrate being solid.
 6. A filtering device comprising:a substrate including; a first horizontal major surface; and a secondhorizontal major surface; a first stack further including; a first layerof piezoelectric material; a first conductive layer deposited on a firstsurface of the first layer of piezoelectric material; and a secondconductive layer deposited on a second surface of the first layer ofpiezoelectric material; and a second stack further including; a secondlayer of piezoelectric material; a third conductive layer deposited on afirst surface of the second layer of piezoelectric material; and afourth conductive layer deposited on a second surface of the secondlayer of piezoelectric material, the first stack and the second stackpositioned vertically with respect to the first and second horizontalsurface.
 7. The filtering device of claim 6 wherein the first stack andthe second stack are connected to one of the first horizontal surface orthe second horizontal surface.
 8. The filtering device of claim 6wherein the first layer of piezoelectric material is a single crystalpiezoelectric film.
 9. The filtering device of claim 6 wherein the firstlayer of piezoelectric material and the second layer of piezoelectricmaterial are each a single crystal piezoelectric film.
 10. The filteringdevice of claim 6 wherein the first stack and the second stack areconnected along one edge to one of the first horizontal surface or thesecond horizontal surface.
 11. The filtering device of claim 6 whereinthe first stack and the second stack each have a first end and a secondend, the first end of the first stack and the first end of the secondstack connected to one of the first horizontal surface or the secondhorizontal surface, and the second end of the first stack and the secondend of the second stack being free.
 12. The filtering device of claim 6further comprising a dielectric layer placed on the first major surfaceof the substrate.
 13. The filtering device of claim 6 furthercomprising: a dielectric layer placed on the first major surface of thesubstrate; a first electrical contact attached to the first conductivelayer; and a second electrical contact attached to the second conductivelayer.
 14. The filtering device of claim 6 further comprising: adielectric layer placed on the first major surface of the substrate; afirst electrical contact attached to the first conductive layer and thefourth conductive layer; and a second electrical contact attached to thesecond conductive layer and the third conductive layer.
 15. A method forforming a device in a substrate comprising: forming a plurality oftrenches within the substrate, each of the plurality of trenches havingsidewalls; growing a piezoelectric layer on at least one of thesidewalls of at least two of the plurality of trenches; removing thesubstrate material between the at least two of the plurality of trenchesto produce at least one freestanding piezoelectric layer having a firstfree end and a second attached end; and placing a conductive layer overthe freestanding piezoelectric layer.
 16. The method of claim 15 furthercomprising removing the portion of the conductive layer from the freeend of the freestanding piezoelectric layer to form a first conductivelayer portion on one side of the freestanding piezoelectric layer andsecond conductive on the other side of the freestanding piezoelectriclayer.
 17. The method of claim 16 further comprising: forming a firstelectrical contact in electrical communication with the first conductivelayer portion; and forming a second electrical contact in electricalcommunication with the second conductive layer portion on the other sideof the freestanding piezoelectric layer.
 18. The method of claim 17further comprising placing an isolative layer between the firstelectrical contact and the substrate, and between the second electricalcontact and the substrate.
 19. The method of claim 15 wherein thesubstrate provided has a miller index of <110>.
 20. The method of claim19 wherein forming a plurality of trenches within the substrate, each ofthe plurality of trenches having sidewalls further includes orientingeach of the plurality of trenches so that the sidewalls of each of theplurality of trenches present a <111> surface.
 21. The method of claim20 wherein growing a piezoelectric layer on at least one of thesidewalls of at least two of the plurality of trenches includes growinga crystal made of AlN.
 22. The method of claim 20 wherein growing apiezoelectric layer on at least one of the sidewalls of at least two ofthe plurality of trenches includes growing a crystal made of SiC. 23.The method of claim 17 further comprising placing a radio frequencysignal between the first electrical contact and the second electricalcontact.
 24. A method for forming a film bulk resonator comprising:forming a vertically orientated piezoelectric layer on the substratehaving a horizontal surface, the vertically orientated piezoelectriclayer having a first side and a second side; and placing a conductivelayer on both the first side of the piezoelectric layer and the secondside of the piezoelectric layer substantially simultaneously.
 25. Themethod as claimed in claim 24 wherein the placing of the conductivelayer is done in a single processing step.
 26. The method as claimed inclaim 24 wherein the placing of the conductive layer is done in a singlestep.
 27. The method as claimed in claim 24 further removing the portionof the conductive layer from a free end of the vertically orientatedpiezoelectric layer to form a first conductive layer portion on one sideof the vertically orientated piezoelectric layer and a second conductivelayer on the other side of the vertically orientated piezoelectriclayer.
 28. A method for forming a device in a substrate comprising:forming a trench within the substrate, the trench having a sidewall;growing a piezoelectric layer on the sidewall of the trench; removingthe substrate material of the sidewall of the trench to produce afreestanding piezoelectric layer having a first free end and a secondattached end; and placing a conductive layer on each side of thefreestanding piezoelectric layer.
 29. The method of claim 28 furthercomprising removing the portion of the conductive layer from the freeend of the freestanding piezoelectric layer to form a first conductivelayer portion on one side of the freestanding piezoelectric layer andsecond conductive on the other side of the freestanding piezoelectriclayer.
 30. The method of claim 29 further comprising placing a radiofrequency signal between the first conductive layer portion and thesecond conductive layer portion.